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Shanley, T.

ISA system architecture - Tercera edición - Massachusetts: Addison-Wesley Pub., 1995 - 508 páginas: 23 cm

Incluye índice: páginas 509-517

1. Intro to microprocessor communications -- 2. Introduction to the Bus Cycle -- 3. Addressing I/O and memory -- 4. The address decode logic -- 5. The 80286 microprocessor -- 6. The reset logic -- 7. The power-up sequence -- 8. The 80286 system Kernel: the engine -- 9. Detailed view of the 80286 bus cycle -- 10. The 80386 DX and SX microprocessors -- 11. The 80386 system Kernel -- 12. Detailed view of the 80386 Bus cycles

ISBN: 0 201 40996 8

Subjects--Topical Terms:
COMPUTADORAS
DISEÑO DE SISTEMAS
MICROPROCESADOR

Dewey Class. No.: 004.324/S47